Selectable clock frequency isn't much of a problem to solve, way bigger engineering challenges for creating a CPS1 multi
Personally I would just use two oscillators with enable pins, and a couple AND gates and that's all thats needed. Or if the multi has a fpga, just have it output selectable clock, easy peasy
Personally I would just use two oscillators with enable pins, and a couple AND gates and that's all thats needed. Or if the multi has a fpga, just have it output selectable clock, easy peasy