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@Frank_fjs Caps?

Operating Rules1.
An external resistor (RX) and an external capacitor (CX)are required for proper operation. The value of CX mayvary from 0 to approximately 1000 mF. For small timeconstants high-grade mica, glass, polypropylene, polycarbonate, or polystyrene material capacitor may be used.For large time constants use tantalum or special aluminum capacitors. If timing capacitor has leakages approaching 100 nA or if stray capacitance from either terminal to ground is greater than 50 pF the timing equationsmay not represent the pulse width the device generates.

National Semiconductor 74LS221 Datasheet
 
Osh Park just shipped Mike's version of the PCB today. Should be here by the weekend. Update then.
 
Oh, so the previous version from Mr Mike was pre-assembled?

With my EDA pcb, I haven't done extensive testing but it worked fine with an MVS board output to a CRT TV.
 
It was a just PCB. 300wins assemled it, soldered into a fingerboard->edge connector.

The version that Hatsune Mike posted here is an updated version. Looks to have added a header added to it. The updated version seems to be more suitable for inline harness assembly.
 
Things remain open. But here are some updates:
  1. Firstly, on the working SPG I have from 300wins via Hatsune Mike's original design (that works), it was built with a 6.8k resistor at R1, and not a 680k resistor. Perhaps Mike forgot that he caught MJ's correction since he worked on this so long ago. Based on this, indeed the correct value for this resistor is indeed 6.8k.
    • Here is pic of that resistor on the working SPG via 300wins<-Hatsune Mike
    • Blue/Gray/Red/Gold = 6.8k +/-5%
    • R1Value.JPG
  2. That working SPG has 5 capacitors!
    • SPG.JPG

  3. Frank's updated design has 5 capacitors as well
  4. Caius's PCB has 5 capacitors
  5. On the schematic, I can only count 4 capacitors
    • C1, C2, C3 are in the schematic and a decoupling cap is recommended between power and ground
    • Where is C5? (And here is where they laymen in me may be confused)
    • Frank's original design only has 4 caps
In any case, looks like I don't have the right caps to complete this project this week. Will have to put this off until next weekend. Update then.

Also, @Hatsune Mike, resistors and capacitors numbering on your PCB arent jiving with the component values based upon what I can read from the schematic. So I am installing components based upon the component values you have silkscreened on the PCB. Let me know if that is correct.
 
My original pcb was missing a power cap for one of the ICs, not a good thing but it wouldn't prevent it from working.
 
Wonder why it isn't in the schematic of the circuit? Or is implied that such a capacitor has to be in place when one of those IC's is used in any circuit?
 
It's written in the schematic.
 
Depends on your expectations / requirements.

I was interested to see if it would help in a Taito F3 / OSSC setup, it doesn't. So to me it's not useful but if you have old boards such as Qbert, pacman etc it will come in handy.
 
Success at last!!!!!!!!!!!
SPG_Working.jpg

Here is a fuzzy pic of it assembled:
SPG_Assembled.jpg

Here is a pic of the harness I made for it so I can connect it in-line to the JAMMA harness I made for the NNC. I can remove it as needed if I need to.
SPG_Harness.jpg

Some Notes for Interested Parties:
  1. @'Hatsune Mike''s version of the SPG works
  2. R1 is silk screened on Mike's SPG as 680R
    1. The correct value for R1 is 6.8K. 680R does not work (I tested it)
  3. Otherwise, all the other values listed on Mike's SGP are correct
Big thanks to @Frank_fjs, @Hatsune Mike, and everyone else that contributed to the discussion. Alight, time to pull out my Phoenix board and see if it works on the Sanwa PFX monitor. Woot!
 
It doesn't. There is some pincushioning. I suggest getting different resistor values for R1 that are near 6.8k to dial in your monitor.
 
Thanks for the information acblunden2, I'm waiting for the components to assemble it.

Maybe using a 10k linear pot can be of help to find the best value for your monitor? I'm not sure if this is a good idea or you may damage something.
 
I’m the wrong guy to ask. The suggestion regarding R1 was just a repeat of what Martin Jones wrote in the comments section on his blog. You should post the question on Martin Jones’ blog and report back your successes. This chapter is closed. Yours now starts.
 
Can I ask why safety capacitors are being used in certain portions of the circuit? Any issues going with standard multi layer ceramic?
 
I've made some modifications to this circuit with success. Adding a 1K pot as a rheostat after the 6K8 resistor allows to fine tune the sync increasing the compatibility with some tvs.

syncfix-schematic.png


I also added a THS7374 to buffer the sync signal with 75 ohm impedance, selectable by a jumper.

Each TTL chip should have a 100nf decoupling cap (not specified in the schematic)
 

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