IDE CDROM drive hardware emulator

[twistedsymphony]

I was looking into something similar to this for work recently and came across a fellow who documents how he implemented an IDE interface with a Microcontroller, and even discusses ATAPI:

https://www.pjrc.com/tech/8051/ide/wesley.html#hwdesc

could have some worthwhile information for anyone working on this.

 

[twistedsymphony]

Found a project emulating an ide drive with a raspberry pi

https://www.retrotronics.org/home-page/netpi-ide/

 

[werejag]

jan 2014 posted. i doubt anything will release

 

[werejag]

https://hackaday.io/project/20774-netpi-ide. seems im wrong

 

[Dion]

i also saw that one on hackaday sometime ago.
another related interesting project is here.

 

[PascalP]

https://hackaday.io/project/20774-netpi-ide. seems im wrong

This would definitely be cool, place all your disc images on the SD, and just change out System 2x6 dongles and select the correct image from the SD

 

[Dion]

another board attempt iteration :

still no time to start coding.

 

[werejag]

sega naomi gdrom drive is ide. so maybe we can make a update disc clone system. i have most of the update security chips made.

 

[werejag]

then maybe we can compile a update disc for some of the dimm firmware discs that do not exist but are badly needed

 

[brizzo]

The past week I've found myself day dreaming of IDE/ATAPI CDROM emulation...

But I keep wondering what the technical challenge has preventing this from already happening years ago? It is a well documented protocol with tons of reference material to work from.

Is there some technical hitch that makes emulating a pc cdrom drive difficult?

 

[Dion]

The past week I've found myself day dreaming of IDE/ATAPI CDROM emulation...

But I keep wondering what the technical challenge has preventing this from already happening years ago? It is a well documented protocol with tons of reference material to work from.

Is there some technical hitch that makes emulating a pc cdrom drive difficult?

the first challenge that i faced is timing restriction of task register access. iirc they're in range of 100ns per cycle. Per cycle means that after you do several things, the task register must be available within 100ns time window. and that is nearly impossible with nowaday microcontroller (at least according to someone when i asked about it). Hence fpga/cpld is a must.

the netpi-ide took a correct approach by utilize lattice as task register, and by that taking the most timing sensitive factor into lattice burden, and the other "slow" things for pi to handle.

 

[twistedsymphony]

So I sent an email to the guys that make the SCSI2SD and asked if they'd considered making an IDE version with ATAPI support... this is what they had to say:

We've actually been experimenting with designs for this for a while, and
have done a couple of PCB designs, but then discovered that the part
we'd hoped to use, which we use in the SCSI2SD V5, doesn't have anywhere
near enough Logic Elements/Universal Digital Blocks, to accomplish the
goal, so we need to re-think the hardware design yet again. It will have
to be a two-chip solution, which unfortunately increases both parts and
assembly costs. The idea of an ATAPI2SD something I personally think
will sell quite well, but we need to be able to manufacture it at a
price point that we feel is going to be acceptable.


So, nothing any time soon, but we're working on it. If I had to fathom a
guess, I'd say we might have something functional somewhere in Q3-Q4
next year.

 

[Darksoft]

At least is something....

 

[deibit]

I've been waiting for years already.. So q4 sounds like a dream, lol

 

[brizzo]

I'd like to be hopeful they come up with something! I've designed a couple breakout pcbs and tests for experimenting with IDE/ATAPI, but ran into speed roadblocks with that design (using mcu+fpga). Got to loading files from DOS, but not streaming media above 4x. Since then I've been trying to learn about implementing 4Bit SD core within FPGA, along with DDR buffer and other fancy sauce parts I dont know how to use. The biggest problem is the mountain of software that needs to be written to design something like this, perhaps thats why nobody has done it...

But all this research had me pondering about how it could be possible to interface modern, new SATA dvd drives to systems that use IDE/ATAPI CD/DVD drives -- and implement the required logic / commands some of these niche market machines require (that otherwise makes sata->ide not work). Still just an idea!

 

[plasia]

So I sent an email to the guys that make the SCSI2SD and asked if they'd considered making an IDE version with ATAPI support... this is what they had to say:

We've actually been experimenting with designs for this for a while, and
have done a couple of PCB designs, but then discovered that the part
we'd hoped to use, which we use in the SCSI2SD V5, doesn't have anywhere
near enough Logic Elements/Universal Digital Blocks, to accomplish the
goal, so we need to re-think the hardware design yet again. It will have
to be a two-chip solution, which unfortunately increases both parts and
assembly costs. The idea of an ATAPI2SD something I personally think
will sell quite well, but we need to be able to manufacture it at a
price point that we feel is going to be acceptable.


So, nothing any time soon, but we're working on it. If I had to fathom a
guess, I'd say we might have something functional somewhere in Q3-Q4
next year.

At least it's something, I was hoping for something sooner though Hoping that wasn't what was hinted at!

 

[Dion]

So I sent an email to the guys that make the SCSI2SD and asked if they'd considered making an IDE version with ATAPI support...

i think asking gd emulator project authors would be more fruitful. they have the skill set required to do this project, maybe?.

I'd like to be hopeful they come up with something! I've designed a couple breakout pcbs and tests for experimenting with IDE/ATAPI, but ran into speed roadblocks with that design (using mcu+fpga). Got to loading files from DOS, but not streaming media above 4x. Since then I've been trying to learn about implementing 4Bit SD core within FPGA, along with DDR buffer and other fancy sauce parts I dont know how to use. The biggest problem is the mountain of software that needs to be written to design something like this, perhaps thats why nobody has done it...

would love to see some photos of your breakouts pcbs, please..

 

[twistedsymphony]

So I saw this pop up on my facebook feed earlier:

I of course expressed my interest in obtaining one to play around with no idea if/when these will actually be available or how well it will work in an application like the 2x6

 

[Dion]

iirc system573 games runs natively on 32x speed cdrom. and some games i knew, rely on the cdrom speed to play.

 

[twistedsymphony]

I honestly don't know or care about system 573 applications of this device. I'm more interested in it's use for System 246