This forum is amazing. 3 days after I asked if there would be any chance of a multi, and this is where it’s at.
But joke's on us, because NOR flash of this size take a while to erase (approx 4min40sec per flash chip). There are nor flash chips that erase fast, but the max capacity for those is 32mbit. We're using 3 x 1024mbit chips.
As this a proof of concept design, I included the circuit for the security pic for further testing. Decided to go with a CPLD (like a mini fpga) for bank switching (selecting games) and being able to maximize flash usage for different size roms.