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chacal231077

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Hi :happy:

I would like to replace the backup Rams with Fram.

I would like to know if I am not on the wrong chip to change ?

20210430-165253.jpg


is this the Ramtron FM1808 used to replace the original Ram Backup chip ?

Thank you :thumbup:
 
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put a battery in and meter the vcc pin on the ram if you want to see if it's the right ones.

as for fram check the schematics - you cant just swap sram > fram.
the sram has to be controlled fully by the game - if one of the enable pins is just tied to ground for example then you need to make other changes.
read the fram datasheet for how the pins need to be handled for reading and writing - you cant take shortcuts like with sram like holding OE low all the time.
for fram that pin must only be low when reading - not writing.
 
you cant take shortcuts like with sram like holding OE low all the time.
for fram that pin must only be low when reading - not writing.
Do you have FeRAM references behaving like that?
If using a FM1808s it's not a problem (drop in replacement).
 
i have had some problems with ferro-ram.
they are easily fixed once you actually know that OE must only be low during read cycles - and not writes.
that's the common issue because a lot of sram circuits just ground the OE or tie it to CE
 
looking at the crap schematic to the 1FS boards, it looks like all the lines are controlled properly - so your probably o.k.
 
i have had some problems with ferro-ram.
they are easily fixed once you actually know that OE must only be low during read cycles - and not writes.
that's the common issue because a lot of sram circuits just ground the OE or tie it to CE
Up to this day I didn't even know that could be an issue. All the FeRAM swaps I've done have been sucessful (consoles internal backup RAM mainly).
Also I'm mostly using RAMTRON devices. That would be great to have a list of which work and which don't.
 
i was using 1608's from ramtron.
incidentally, others have had issues too.
it seems you cant keep the CE low between reads and writes either.
these 2 circuits arent mine - they are from other people doing the same thing.
 

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The datasheet states that address latching is done when CE goes low and there's a specific order for when to do it when writing. I think this is what may cause the incompatibility issues @stj has found. It wouldn't surprise me some implementations simply assume that a new address is latched after some time and never bother to toggle CE. Still, it is strange...
 
@stj and @ic3b4ll we were talking about OE.
The address latching you describe on CE falling edge is normal/standard behaviour for RAMs and even ROMs.
 
yes, but a lot of designs just hold the signal low because sram and eproms arent clocked devices and just changing the address bits causes instant change.
i have seen so many schematics with CE or OE or even both just tied to ground that it's not even funny!
 
Hi! :)

which are to be replaced by Ramtrons for the backup ram ?


I received the Ramtron chips ^^

Thank you
 
i already said, to find out just check which are getting 3v with the board disconnected. (and a battery fitted)
 
Hi ! :)


I changed the 2 localized Backup RAM chips: Upper H6, Lower H5.

The problem now I have this screen at each start

apparently the time setting and the calendar remains in memory
Maybe I should put just the original chip ram back on the H5 location ?

20210509-163018.jpg
20210509-173715.jpg
20210509-172248.jpg
 
so now you understand the importance of how the control lines are toggled - time to scope them!
 
so now you understand the importance of how the control lines are toggled - time to scope them!
If the FeRAMs where bought on ebay or aliexpress there's a high chance they are fake.
I'd have tested them before installation.

I could try the same here to confirm a control lines issue.
 
If the FeRAMs where bought on ebay or aliexpress there's a high chance they are fake.
I'd have tested them before installation.

I could try the same here to confirm a control lines issue.
note : I confirm that i mount fake FE1808 (aliexpress) into Saturn and loose 1h to understand why the save do not work.. SRAM branded as FRAM..

Did FE1808 need to have the pin 22 lift and grounded to have active low with MVS (so grounded) like in Saturn FRAM mod ? Or did we need a special circuit to have different state on pin 22 when reading or writing ?
 
pin22 must be inverse of WE,
high for writes and low for reads.
 
Yes so this cannot be done automatically, how can this be done in our case, using a specific schematic and ic ?
 
Yes so this cannot be done automatically, how can this be done in our case, using a specific schematic and ic ?
We need to confirm it's needed first.
Then, for a discrete solution we could use a single gate NOT (like SN74LVC1G04).
 
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