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Build your own Furrtek NeoGeo Fusion MVS to AES adapter - how to program .jed to CPLD?

All the bits arrived - probably not going to win any prizes for cable craftsmanship on this one
IMG_9516.png

This threw up a lot of errors, but it does seem to work
on OSX
brew install open-ocd
then download .um232h.cfg
openocd -f ./um232h.cfg -c "adapter speed 400" -c "transport select jtag" -c init -c scan_chain -c shutdown
gives result
<snip>
Info : JTAG tap: auto0.tap tap/device found: 0x0180e043 (mfg: 0x021 (Lattice Semi.), part: 0x180e, ver: 0x0)
Warn : AUTO auto0.tap - use "jtag newtap auto0 tap -irlen 3 -expected-id 0x0180e043"
Warn : gdb services need one or more targets defined
TapName Enabled IdCode Expected IrLen IrCap IrMask
-- ------------------- -------- ---------- ---------- ----- ----- ------
0 auto0.tap Y 0x0180e043 0x00000000 3 0x01 0x03

So the programer can see... something. Clearly the sensible thing is to ignore all the errors, force-feed it the SVF, and see what happens

download fusion_vsense.svf
openocd -f ./um232h.cfg -c "adapter speed 400" -c "transport select jtag" -c init -c "svf fusion_vsense.svf" -c shutdown
gives result
<snip>
Info : JTAG tap: auto0.tap tap/device found: 0x0180e043 (mfg: 0x021 (Lattice Semi.), part: 0x180e, ver: 0x0)
Warn : AUTO auto0.tap - use "jtag newtap auto0 tap -irlen 3 -expected-id 0x0180e043"
Warn : gdb services need one or more targets defined
svf processing file: "fusion_vsense.svf"
HDR 0;
HIR 0;
TDR 0;
TIR 0;
ENDDR DRPAUSE;
ENDIR IRPAUSE;
FREQUENCY 1.00e+006 HZ;
adapter speed: 1000 kHz
STATE IDLE;
SIR 8 TDI (16);
STATE IDLE;
MASK (FFFFFFFF);
SIR 8 TDI (1C);
SDR 138 TDI (00000000000000000000000000000000000);
SIR 8 TDI (15);
RUNTEST IDLE 3 TCK 2.00E-002 SEC;
SIR 8 TDI (03);
RUNTEST IDLE 3 TCK 1.00E-001 SEC;
SIR 8 TDI (14);
RUNTEST IDLE 3 TCK 1.00E-002 SEC;
<snip>
MASK (FF);
SIR 8 TDI (1E);
RUNTEST IDLE 3 TCK 2.00E-001 SEC;
Time used: 0m2s642ms
svf file programmed successfully for 441 commands with 0 errors
shutdown command invoked

So at this point have successfully written something to something, and generated a lot of non-critical warnings. Great success!

edit: there might be more to this story - the board was not externally powered when I did this - so its written something, but has it written the right thing?
 
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Did you end up just soldering onto the JTAG pads? I was looking to see if there was a pogo pin arrangement I could use.
 
Mine was a bit of a mess. The pads are designed for 1.27mm pitch. Ihad plenty of spare SMT header left over from another project. but of course I had no 1.27mm Female to tail cable, so had to make some out of spare female header.

If I was doing it again I'd probably redraw the board with 2.54mm pads and use standard pogo pins - not like there is a shortage of space on that aircraft carrier.
 
Hello,
Did the adapter correctly works as expected ?
I am redesigning the PCB to connect a MVS horizontally, the only interrogation for me is about how to program the cpld :-/
Only OpenOCD and "FT232H USB to JTAG" is needed ?
 
I was curious how you're supplying power; I can't tell from the photo but it looks like you're using the same FTDI trinket that is used for programming the Neo Geo Diag PCBs which only supplies 3.3V or 5V, (at least the one I have anyway), and the CPLD is a 1.8V part.

I found a Mill-Max part that has 2x3 pogo pins spaced 1.27mm apart so was going to try and use one of those to build a harness for programming.
 
I was curious how you're supplying power; I can't tell from the photo but it looks like you're using the same FTDI trinket that is used for programming the Neo Geo Diag PCBs which only supplies 3.3V or 5V, (at least the one I have anyway), and the CPLD is a 1.8V part.

I found a Mill-Max part that has 2x3 pogo pins spaced 1.27mm apart so was going to try and use one of those to build a harness for programming.
Do you have a link for that part?
My tigard jtag board goes down to 1.8V, alternatively you can get power from the board you connect to to power the bus drivers.
 
Do you have a link for that part?
This is what I found: https://www.mouser.co.uk/ProductDetail/575-8552200610003101

I haven't ordered one yet, but it looked like it should work if the pads are spaced correctly.
My tigard jtag board goes down to 1.8V, alternatively you can get power from the board you connect to to power the bus drivers.
This is what I was expecting to have to do; inject 5V into the board so the on-board regulator generates the 1.8V and powers the CPLD, then use a genuine USB blaster or similar that uses the 1V8 pad as a reference only rather than supply power. Or I find a.n.other JTAG widget that supplies 1.8V.
 
My tigard jtag board goes down to 1.8V, alternatively you can get power from the board you connect to to power the bus drivers.
That Tigard board actually looks quite useful, and I can get one from Mouser along with everything else.

There's no such thing as too many FTDI widgets!
 
Agree, I fear I may have been giving the CPLD 3.3v instead of the required 1.8.

The datasheet for FT232H (genuine) does make vague mention of an LDO for 1.8v, but my reading is that it’s for on-device supply, not programming.
https://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_UM232H.pdf

Other possibility is that the CPLD itself is over-voltage tolerant enough that 3.3v is ok. Reading the datasheet I’m feeling like this might be more likley here. All the way up to +5v in some use-cases
https://www.latticesemi.com/~/media...tions/ispMACH4000ZE Family Data Sheet1022.pdf
 
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