Thanks
MVS 2 Slot Repair Help
- Thread starter r67055
- Start date
hatmoose
Enlightened
So many problems with multi slot MVS - a technical miracle and by far my favourite arcade system - well worth the effort
Some repair logs here https://www.neo-geo.com/forums/inde...hdog-even-with-neogeo-diagnostic-bios.267802/
And here https://www.neo-geo.com/forums/index.php?threads/mv4t-no-sound-when-cart-inserted.267803/
And here https://www.neo-geo.com/forums/inde...ery-damage-garbage-overlaid-on-screen.269092/
and here too https://www.arcade-projects.com/thr...e-a-perfectly-sensible-idea.18823/post-307775
Specifically around the NEO-IO fault - garbage overlaid on screen
NEOB1 is generating palette RAM address requests correctly and sending them on the P-BUS to NEO-IO
NEO-IO is receiving the requests correctly then generating SFX rom addresses incorrectly, then sending incorrect requests on BIT6 and BIT7 to SFX-ROM
SFX-ROM is getting bad rom addresses to look up from NEO-IO it is correctly looking up the wrong tiles and sending those wrong tiles on SFXD to NEO-B0
NEO-B0 is correctly sending the wrong tiles to the Palette ram
The Palette ram is making those wrong tiles available to be rendered by the DAC
The wrong tiles are showing up on the screen
The tool that I've found most helpful for this kind of thing is a logic probe. With one of those you can check for stuck and suspect pins really quickly which will help trace faults much faster.
Some repair logs here https://www.neo-geo.com/forums/inde...hdog-even-with-neogeo-diagnostic-bios.267802/
And here https://www.neo-geo.com/forums/index.php?threads/mv4t-no-sound-when-cart-inserted.267803/
And here https://www.neo-geo.com/forums/inde...ery-damage-garbage-overlaid-on-screen.269092/
and here too https://www.arcade-projects.com/thr...e-a-perfectly-sensible-idea.18823/post-307775
Specifically around the NEO-IO fault - garbage overlaid on screen
NEOB1 is generating palette RAM address requests correctly and sending them on the P-BUS to NEO-IO
NEO-IO is receiving the requests correctly then generating SFX rom addresses incorrectly, then sending incorrect requests on BIT6 and BIT7 to SFX-ROM
SFX-ROM is getting bad rom addresses to look up from NEO-IO it is correctly looking up the wrong tiles and sending those wrong tiles on SFXD to NEO-B0
NEO-B0 is correctly sending the wrong tiles to the Palette ram
The Palette ram is making those wrong tiles available to be rendered by the DAC
The wrong tiles are showing up on the screen
The tool that I've found most helpful for this kind of thing is a logic probe. With one of those you can check for stuck and suspect pins really quickly which will help trace faults much faster.
Thank you very much for helping me!!
I'm not a professional, but I have a logic probe. What should I check with the logic probe?
This error is pointing to an issue with the address lines.
That test is writing out an incrementing value at each address, then re-reads them back. It does this is 2 passes, one for the lower address lines and one for the upper ones, so
Code:
Lower address line pass
addr data
00000 0000
00002 0101
00004 0202
00006 0303
00008 0404
...
Upper address line pass
addr data
00000 0000
00100 0101
00200 0202
00300 0303
00400 0404
...The error message is a little weird in that its saying the issue is with the upper address lines, but then lists the address as 000000. I'm going to assume the text error is correct and the address value is bad.
You got
Code:
Actual: 0404
Expected: 0000This would imply that writes/reads to both address 000000 and 00400 got mapped to the same address. This would point to an issue with address line 10, it could be stuck high or low or maybe it its floating. The issue is effecting both chip.
I would also suggest going directly to the main menu (hold abcd on power on), and see if the 2k ram test throws an error too.
I decided to replace the NEO-IO. The NEO-IO was not faulty, the same fault remained after it.
- could be a fault with the ram or lspc2
- could be a bridge some place along the path between the ram and lspc2
First thing I would probably do is use your multi-meter and see what the resistance is from pin 21 on the ram to pin 28 (vcc)
maki
Student
The LSPC2-A2 is harder to solder than the NEO-B1 as it has a finer pitch between the pins.
I would not recommend to practice that on a MVS/AES tbh, there is a learning curve, things will break in the beginning.
You could practise on MegaDrives/Genesis, the ASIC/VDP in there are quite similar to the ones found in the NeoGeo in terms of size and pins, also has the 68k and Z80, way cheaper and easier to find.
For these kind of things I use self-made low-melt solder:
by weight, 50% leaded solder and 50% bismuth, done
works wells and is way cheaper than chip quick, you still need oceans of flux though, I use the solder from my de-solder pump, even cheaper
it will reduce the thermal stress on the PCB and components, especially traces and pads will lift of the temps are too high (the old epoxy wasn't meant for lead free high temp solder)
but you really need to remove that low-melt solder again after harvesting the ICs (or low-density plastic connectors or whatever you use it for).
For re-soldering I use leaded 60/40 solder.
soldering is a craft, it needs to be practised
once you have acquired the skills, it will be valuable, but don't rush it, there is a learning curve
I would not recommend to practice that on a MVS/AES tbh, there is a learning curve, things will break in the beginning.
You could practise on MegaDrives/Genesis, the ASIC/VDP in there are quite similar to the ones found in the NeoGeo in terms of size and pins, also has the 68k and Z80, way cheaper and easier to find.
For these kind of things I use self-made low-melt solder:
by weight, 50% leaded solder and 50% bismuth, done
works wells and is way cheaper than chip quick, you still need oceans of flux though, I use the solder from my de-solder pump, even cheaper
it will reduce the thermal stress on the PCB and components, especially traces and pads will lift of the temps are too high (the old epoxy wasn't meant for lead free high temp solder)
but you really need to remove that low-melt solder again after harvesting the ICs (or low-density plastic connectors or whatever you use it for).
For re-soldering I use leaded 60/40 solder.
soldering is a craft, it needs to be practised
once you have acquired the skills, it will be valuable, but don't rush it, there is a learning curve
ThanksThe LSPC2-A2 is harder to solder than the NEO-B1 as it has a finer pitch between the pins.
I would not recommend to practice that on a MVS/AES tbh, there is a learning curve, things will break in the beginning.
You could practise on MegaDrives/Genesis, the ASIC/VDP in there are quite similar to the ones found in the NeoGeo in terms of size and pins, also has the 68k and Z80, way cheaper and easier to find.
For these kind of things I use self-made low-melt solder:
by weight, 50% leaded solder and 50% bismuth, done
works wells and is way cheaper than chip quick, you still need oceans of flux though, I use the solder from my de-solder pump, even cheaper
it will reduce the thermal stress on the PCB and components, especially traces and pads will lift of the temps are too high (the old epoxy wasn't meant for lead free high temp solder)
but you really need to remove that low-melt solder again after harvesting the ICs (or low-density plastic connectors or whatever you use it for).
For re-soldering I use leaded 60/40 solder.
soldering is a craft, it needs to be practised
once you have acquired the skills, it will be valuable, but don't rush it, there is a learning curve
channelmaniac
Professional
First thing I'd do is cobble a reset switch on the PCB then use my logic probe to see what signals are or aren't there... Next, I'd check resistance from each data and address pin to +5 and Ground to see if there's a problem on a pin with low resistance. That will show you if you have a bad chip on a particular signal line.
The reset switch would be to hold the board in reset while you probe?