Trying to fix a CPS2 B board with a red screen.

[hrist]

Hi there!

Looking for advice if possible from you guys, hope i'm coherent below. Thanks in advance!

I got a 93646B-7 board with a dead battery, it had a green screen initially.
After removing it and swapping the romset for a valid phoenixed one i'm getting a brownish red screen on boot (sometimes cyan or otner random colors when I power down and up the board)

- A board is fine, tried another board combinations.
- I'm using Razoola's test rom on socket 3.
- Did an inspection with a scope and checked suspicious traces.
- Shorted EXC caps just in case.
- Checked all discrete components (caps, resistor arrays...) Had a wrong D1 diode near the battery, got swapped to no effect.
- Checked the VCC/GND lines of the components.
- Tested continuity between all the program rom socket pins and customs/gals/LS245 etc..

Now i'm checking behaviours with an oscilloscope comparing side to side with a working board, same model.

- pals/LS245 and the two memories seem to behave (with my limited knowledge) as they should.
- The pal on H10 is acting hotter (3/4 degrees) than the other one above and the other two of the good boards (tested with a termal camera)
- They do act different between the good board like having I/O ports flat UP vs activity on the GB but I guess it's normal, the problematic board is in a halted state.

I then checked all the DL ICs

(GB means "good board")

# DL-1525
pin 15 (CLK16M) UP (to DL-1727 port 138) (Not 16MHz) NOK
pin 3 (GFX-DATA-E) DOWN (to DL-2027 port 116) (Activity on GB) NOK
pin 4 (GFX-ADDR-W) DOWN (to DL-1927 port 112) (Activity on GB) NOK

# DL-1927
pin 112 (GFX-ADDR-W) DOWN (to DL-1525 4) (Activity at 1MHz on GB)

# DL-2027
pin 116 (G2) DOWN (to DL-1525 port 3)(Activity at 4MHz on GB) NOK

# DL-1727
pin 65 (CBUS-DATA-DIR) DOWN (Activity on GB) NOK
pin 45 (CBUS-ADDR-ENABLE) DOWN (Activity on GB) NOK
pin 34 (ENABLE-ADR-BUS) UP (Activity on GB) NOK
pin 45 (CBUS-ADDR-ENABLE) DOWN (Activity on GB) NOK
pin 138 (CLK16M-OUT) UP (to DL-1525 port 15) (not sending 16MHz like the GB does) NOK
pin 67 (EXPANSION-E) UP (Different activity on GB) NOK
pin 24 (ENABLE-DATA) UP (Activity at 4MHz on GB) NOK

# DL-1827
pin 157 (CPSA-BR) UP (Diff freq on GB) NOK
pin 158 (REFRESH) UP (Diff freq on GB) NOK
pin 48 (SRAM-HW) UP (Different activity on GB) NOK
pin 47 (SRAM-WL) UP (Different activity on GB) NOK
pin 124 (SRAM-OE) UP (Different activity on GB) NOK
pin 125 (SRAM-E) UP (Different activity on GB) NOK

So for now the only real problem i'm able to get is DL-1727 is not sending a proper 16MHz clock signal to DL-1525, but don't know if it's a cause or just an effect of another problem behind, DL-1727 is getting all the input clock signals properly.

Now i'm lost because dont't know anything about the behaviour and interoperability of these customs, i was hoping to find somethink like a broken trace or shorted component.

Is there any diagram/flowchart on how the B board have to behave to be able to read program code? Any hint is really appreciated.

Kudos to WydD for his CPS2 B-Board Wiring Spreadsheet and schematics of course!

 

[hrist]

Updade: i just realized i had a problem with the jamma harness i'm using for the testing setup and the color i've been geting is a dark/brownish red.
I desoldered and put a socket on the H10 PAL. Burned a new gal on it but it didn't help.

 

[hrist]

Today i lifted a pad to isolate the clock line from DL-1727 to DL-1525 then tried to feed DL-1525 with the direct 16MHz clock from the A board. I got a glitchy screen with some bars when using the encrypted romset and pushing the key with an arduino. Still red screen when using Razoola's test rom.

I think i'll try to follow the pins from the CN connectors to the IC's using the excel as a last effort.