Vote: What style M92 Multi would you buy?

[kuze]

M84 is real, got the schematic as proof


Yeah it's possible so not surprised. I hear M97 can be ported to it also.

Is that the rom board or repro main board? Rom board first please! Those of us with an M84 Hammerin Harry are drooling

 

[Hammy]

Is that the rom board or repro main board? Rom board first please! Those of us with an M84 Hammerin Harry are drooling

Well, i did the hardware for the rom board and motherboard, the real holdup is the last 3 games need porting

 

[XtraSmiley]

I voted for the MT2 version, but you should have a vote option for any of the above!

 

[kuze]

Well, i did the hardware for the rom board and motherboard, the real holdup is the last 3 games need porting

Which are the last three that need porting? Image Fight, Tonma, Mr Heli?

Seems like it would be worth assembling in beta status with the already ported games

 

[brizzo]

If these were to be put into 27C322: 88.4MiB/4MiB = 23 EPROMs

It would take 51 x 27c322, due to the bus layout

No FPGA/CPU required PERIOD!

Any way you slice it, eeprom or flash, 5v or 3.3v memory, fpga/cpld programmable logic is required.

I am suggesting the quickest path to a physical multi. Having the ~14 game M92 ROM set on EEPROMs is not viable.

Correct.

Its not, this would be preformed with large capacity TSOPs or other modern storage medium.

Yup, along with 28 x 8bit bus translators + logic to control bank selection

Well 5V SRAM to be specific, in 8-bit width, stuff that Digikey has in stock.
https://www.digikey.com/en/products/detail/alliance-memory-inc/AS6C8008-55ZIN/4234598

How do you assert bus control to program the 5 separate buses in circuit?

 

[dewmansnk]

...
How do you assert bus control to program the 5 separate buses in circuit?

I was going to bring in the PCB control signals to the multi PCB through 244 buffers, while bootstrapping the SRAM with data, I would have the buffers in high impedance output until I was done loading the SRAM with content. Similar with the data lines to each SRAM, use a 244 buffer between the single FPGA data bus and each SRAM and just program them one by one, then keep the 244 in high impedance while the PCB is actually running. Pry some steps around resetting the main CPU to get the board in a running state would be needed as well.


But that brings up a good point about how to keep the busses quiet while we do the bootstrapping. Maybe not an ideal choice but you could gate the oscillator on the main PCB to keep those ASIC chips from running while the multi bootstraps. If you use the RV901T, you have a pretty fancy PLL at hand and could regenerate the same clock frequency that the crystal + discreate chips was making. Just feed the PLL derived clock into the M92 and wait till once you have finished the bootstrap routine before sending the clock pulses to the M92.

 

[Hammy]

Which are the last three that need porting? Image Fight, Tonma, Mr Heli?

Image fight, tonma .... Mr heli and pound 4 pound are 50% done so together count as 1

Seems like it would be worth assembling in beta status with the already ported games

Well, the hardware comes first always.... Ports always take longer and should always be expected as a bonus, but in this case it's pointless without the full set

 

[Mitsurugi-w]

We have been developing an M92 multi "just in case" for awhile now. Info here:

https://www.arcade-projects.com/threads/irem-m92-multi-game-support.20129/

 

[fafar10]

1 ! i have a MAJOR TITLE 2 near mint and $350 taste very nice