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Any PGM Conversion info out there?

jepjepjep said:
Is it possible that the AMB version used for the hack is based on this (already hacked version):

' said:
DoDonPachi DOJ Black Label Save hack : Add save functionality to your DOJ WL PCB with this simple ROM swap. Do not use on an original DOJ BL PCB. It might work, but it will stop the original EPROM from booting.

There are a couple of known issues with this ROM. Obviosly it will not save without the battery. Also, if the NVRAM contains data that that the high score table does not understand it will crash. The brown switch on the PCB should not be used. Whilst it should clear the NVRAM, the 'clear' state cannot be verified and my leave spurious data which will crash the PCB. Factory resetting the PCB from within the test menu *may* return the NVRAM to a usable state but cannot be guaranteed.

Note; If the PCB is powered off whilst the game is saving the NVRAM contenets may get corrupted.

If the NVRAM does get corrupted the modified DOJ BL EPROMs or original WL EPROMs will still work without issue.
Click to expand...
Maybe it is possible to use this version instead:
http://ikotsu.blogspot.com/2012/01/dodonpachi-white-label-black-label.html

This "white label" to "black label" conversion rom seems to be cleaner than the "high score saving" hacked rom (at least closer to the original black label code, just without the suicide battery protection).
Click to expand...
Right well, the thing is, we don't know what the AMB version is based on for sure.
From the behaviour it seems to be the 'original' black version with bugs intact like described above.
But again i am not sure.

It's not clear why he did remove the menu. One can say the black version is the better game, and he just skipped the whole thing to avoid the crash.

At this point i'm stumped why it works good on my board.
i did factory default it from the internal test menu in the game with the rom i got from sheep nova in the cart original.
Maybe that's the key to avoiding all the issues? (Along with a battery to keep the nvram intact after that.)
 
djsheep said:
Frank_fjs said:
@Apocalypse

Any chance of a Bee Storm conversion?
Click to expand...
I believe the Bee Storm cart has a graphics chip not on any other cart? Keep checkin' eBay for Yaton listings, you'll eventually get one at your price, or hit up @sheep_nova -- he gets them from time-to-time also!
Click to expand...
There were actually complete Bee Storm kits on eBay recently. The only problem was that the main boards had massive battery liquid damage, though the cartridge and rest of the kit was fine.
So far I am not sure if the board is fixable, or if I can use it for parts...

By the way, I found the audio problem with the char board: I mixed up the address lines to the decoder. Sigh. Easy to patch, though.
 
I saw the Bee kits, they were in horrible condition with the motherboards being absolutely unsalvageable. I wasn't happy paying $500 AU for single cart with peeling label.
 
Fluffy said:
fi_u15_hack.pld: fi_u15.pld with the mod from Any PGM Conversion info out there? already applied:
- it assumes PA21 is permanently one
- it passes PA20 through unchanged
- it sets the ROM's pin 32 to permanently 0
PGM_FI_U15_HACK.jed: The pld compiled with WinCUPL
Click to expand...
I programmed one of these for my 0333-03 Cart and it worked perfectly.

I tried adapting it for the Killing Blade but unfortunately the connections for U17 and U14 aren't mapped on the Killing blade cart.

One weird thing I did notice though is
U15 Pin 13 goes to U17 Pin 6
and U15 Pin 14 goes to U17 Pin 9

U17 is a 7404 (NOT gate array) and on that pin 5 is tied to pin 8

In effect that means PAL output pin 14 gets NOTed twice and then passed back on PAL input Pin 13
I've checked it like 4 times because it doesn't make any sense to me but yeah that's how it's wired.

even more confusing is U17 pin 1 which is an input on that chip and tied to an input on the PAL...

I was able to simplify the logic to this with the game still working properly:
Code: 
/* Logic */
TO_J2_27 = 'b'1;
P_ROM_OE = ((PA20 & PA22) # PA22 # PA23 # AS);
PA21_I = 'b'0;
PA20_I = PA20;
TO_U10_1 = 'b'1;
TO_U9_15 = 'b'0;
UK4 = 'b'1;
UK5 = 'b'1;
UK6 = 'b'1;
UK7 = 'b'1;
Also another WTF is that on the Killing blade cart PCB J1 and J2 are labeled backwards from the KOV2 cart PCB -_- You know because this isn't confusing enough.
 
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twistedsymphony said:
Also another WTF is that on the Killing blade cart PCB J1 and J2 are labeled backwards from the KOV2 cart PCB -_- You know because this isn't confusing enough.
Click to expand...
Yeah, it is different between my KOVSH and KOV2 boards as well... Revision 1.1 of the char board and the prog board will have all connector pins labelled with the signal name on the silkscreen to avoid confusion in the future.
twistedsymphony said:
I tried adapting it for the Killing Blade but unfortunately the connections for U17 and U14 aren't mapped on the Killing blade cart.
Click to expand...
There doesn't seem to be any consistency in the numbering of the chips... I guess they just plonked everything into the schematic and then used automatic annotation.
One weird thing I did notice though is
U15 Pin 13 goes to U17 Pin 6
and U15 Pin 14 goes to U17 Pin 9

U17 is a 7404 (NOT gate array) and on that pin 5 is tied to pin 8

In effect that means PAL output pin 14 gets NOTed twice and then passed back on PAL input Pin 13
I've checked it like 4 times because it doesn't make any sense to me but yeah that's how it's wired.
Click to expand...
The only reason may be to get a small delay into the signal. (Or it is a leftover from an earlier revision of the board.)
even more confusing is U17 pin 1 which is an input on that chip and tied to an input on the PAL...
Click to expand...
I noticed that as well. I was planning to see if both are connected to another output somewhere, but didn't have time.
 
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I think carts are inlyI saw the Bee kits, they were in horrible condition with the motherboards being absolutely unsalvageable. I wasn't happy paying $500 AU for single cart with peeling label.
$170 usd! Do you want me to mail you one?

Sheep Nova got mine for $150, he may have more.
 
Yeah, so Yaton listed several kits which were in disgusting condition, the motherboards had major battery leakage damage and from the photos were a write off. They weren't new, they weren't unopened and they were seemingly stored in a swamp. He sold them for USD $270 plus $40 shipping. Being in Australia I need to add 10% tax to both those prices so I was up for over $500 AU ($341 USD) with the added tax and crappy exchange rate, let alone PayPal padding the exchange rate out in their favour. I'm actually surprised he sold them so quickly at that price given their condition and the fact that the motherboards were toast.

I've asked sheep but he's on holidays at the moment.
 
Fluffy said:
There doesn't seem to be any consistency in the numbering of the chips... I guess they just plonked everything into the schematic and then used automatic annotation.
Click to expand...
I'm not talking about IC numbering... U14 on KOV2 is the second PAL... there is NO connection that I can find to the second PAL on the Killing Blade cart.

I mapped out the U1 PAL on Killing Blade and tried to adapt the working "Hacked" PAL you created for KOV2 but no dice.

if you want to try this is the mapping for the Killing Blade PAL:
DH UX1 22V10Q
1-J1 pin 30 and U8 Pin 1 (unpopulated PAL)
2-J1 pin 33 (was pin 3)
3-J1 pin 34 (was pin 4)
4-J1 pin 35 (was pin 5)
5-J1 pin 36 (was pin 6)
6-J1 pin 37
7-J1 pin 38
8-J1 pin 39
9-J1 pin 40 & U9 Pin 34 (PRG ROM A15) (was pin 2)
10-J1 pin 26
11-J1 pin 24
12- GND
---
13-N/A
14-U5 Pin 24 (unpopulated EPROM)
15-U3 Pin 24 (unpopulated EPROM)
16-U22 Pin ?? (unpopulated ASIC)
17-U21 Pin 2 (74LS245)
18-U16 Pin 19 (74LS245)
19-U9 Pin 42 (PRG ROM A19) (was pin 20)
20-NC
21-U9 Pin 32 (PRG ROM A20)(unchanged)
22-U9 Pin 13 (PRG ROM OE)(unchanged)
23-J1 pin 27 (unchanged)
24- +5V
 
I'll check tomorrow. Meanwhile, can you check, please, if any of the data pins of the program ROM go to any PAL or other logic chip? My suspicion is that bit 4 and bit 12 don't go directly to J1...
 
you're correct that they don't. They're mapped to the u8 pal, but that is what the two jumper wires are for once u8 is removed. They properly map the those two pins of the program rom to the edge connector.

I've confirmed that once those jumper wires are in place that the program rom is mapped out to the same j1 pins as the 0333 carts.


The only difference I found is that on the 0333 cart some of the pins are routed to both j1 and j2 where on killing blade they're j1 only.
 
Ok, got around to putting the new DDP Dual Rom into my cart.

On first boot, I got the Version select, and upon selecting (Old) I got an error.

Hard Reset the cab, booted back to game select, selected (New) game booted fine but had some graphic errors on the High Score screen, but game booted and played fine.

Hard Reset the cab. Selected (Old) Game booted fine, but with the same graphical glitches as (New)

After a few resets, everything has seemed to cleared up and is working PERFECTLY now.

So awesome, and cannot thank you all enough for figuring this out!
 
So I have a Lydz cart and decided to map that out for comparison. it seems it uses the same PALs as 0333-03

Program ROM
01-J1 pin 37
02-J1 pin 38
03-J1 pin 48 & J2 21
04-J1 pin 49
05-J1 pin 50
06-J1 pin 51
07-J1 pin 52
08-J1 pin 55
09-J1 pin 54
10-J1 pin 53
11- +5V
12- +5V
13- PAL1 Pin 22
14-J1 pin 18 & resistor array (RP4)
15-J1 pin 10 & resistor array (RP4)
16-J1 pin 17 & resistor array (RP4)
17-J1 pin 05 & resistor array (RP4)
18-J1 pin 16 & resistor array (RP4)
19-J1 pin 06 & resistor array (RP4)
20-J1 pin 15 & resistor array (RP4)
21-J1 pin 07 & resistor array (RP4)
----
22- GND
23-J1 pin 14 & resistor array (RP6)
24-J1 pin 08 & resistor array (RP6)
25-J1 pin 13 & resistor array (RP6)
26-J1 pin 09 & resistor array (RP6)
27-J1 pin 12 & resistor array (RP6)
28-J1 pin 19 & resistor array (RP6)
29-J1 pin 11 & resistor array (RP6)
30-J1 pin 20 & resistor array (RP6)
31- +5V
32- PAL1 Pin 21
33-J1 pin 39
34-J1 pin 40 & PAL1 Pin 2
35-J1 pin 41
36-J1 pin 42
37-J1 pin 43
38-J1 pin 44
39-J1 pin 45
40-J1 pin 46
41-J1 pin 47
42- PAL1 Pin 20



PAL1 GAL22V10
1-J1 pin 30
2-J1 pin 40 & PRG ROM Pin 34 (A15)
3-J1 pin 33
4-J1 pin 34
5-J1 pin 35
6-J1 pin 36
7-NC
8-NC
9-NC
10-NC
11-NC
12- GND
---
13-NC
14-NC
15-NC
16-NC
17-NC
18-NC
19-NC
20-prg rom 42 (A19)
21-prg rom 32 (A20)
22-prg rom 13 (OE)
23-NC
24- +5V


PAL2 U14 GAL22V10
1- NC
2- J2 pin 51
3- J2 pin 50
4- J2 pin 49
5- J2 pin 48
6- J2 pin 47
7- NC
8- NC
9- NC
10- NC
11- NC
12- GND
---
13- NC
14- NC
15- U21 pin 14 (BG ROM)
16- U21 pin 2 (BG ROM)
17- U21 pin 43 (BG ROM)
18- U21 pin 44 (BG ROM)
19- U21 pin 1 (BG ROM)
20- NC
21- NC
22- NC
23- J2 Pin 14
24- +5V

After going through this I went back and compared to Killing Blade... AGAIN and once again confirmed that everything involving the program ROM and the Program ROM Pal is mapped the same. the only thing I can think of is maybe something special needs to be done with the output pins going to the 74 series logic in order to fully disable them; Maybe they're interfering with the program ROM?
 
twistedsymphony said:
I mapped out the U1 PAL on Killing Blade and tried to adapt the working "Hacked" PAL you created for KOV2 but no dice.
Click to expand...
I just had a look, but I don't think my solution is any different to yours:

Code: 
PartNo PAL_CE;
Date 10/02/2019;
Revision 01;
Designer Fluffy;
Company None;
Assembly None;
Location None;
Device g22v10;
Name DH_UX1_HACK;

/* Inputs */
Pin 1 = AS;
Pin 2 = PA23;
Pin 3 = PA22;
Pin 4 = PA21;
Pin 5 = PA20;
Pin 6 = PA19;
Pin 7 = PA18;
Pin 8 = PA17;
Pin 9 = PA16;
Pin 10 = J1_26;
Pin 11 = J1_24;

/* Outputs */
Pin 14 = U5_OE;
Pin 15 = U3_OE;
Pin 16 = U22_OE;
Pin 17 = U21_OE;
Pin 18 = U16_A1;
Pin 19 = PA20_I;
Pin 20 = NC;
Pin 21 = PA21_I;
Pin 22 = P_ROM_OE;
Pin 23 = INT_P_ROM_OE;

/* Logic */
P_ROM_OE = ((PA20 & PA22) # PA22 # PA23 # AS);
INT_P_ROM_OE = 'b'1;
PA21_I = 'b'0;
PA20_I = PA20;

U5_OE = 'b'1;
U3_OE = 'b'1;
U22_OE = 'b'1;

U21_OE = 'b'1;
U16_A1 = 'b'1;
The only unknown thing are the connections to the 74LS245, which is a bi-directional buffer: http://www.ti.com/lit/ds/symlink/sn74ls245.pdf
Pin 2 is one of the channels, Pin 19 is the OE. Is it possible that Pin 19 of multiple 74LS245 is connected together?

twistedsymphony said:
After going through this I went back and compared to Killing Blade... AGAIN and once again confirmed that everything involving the program ROM and the Program ROM Pal is mapped the same. the only thing I can think of is maybe something special needs to be done with the output pins going to the 74 series logic in order to fully disable them; Maybe they're interfering with the program ROM?
Click to expand...
My guess is that this is related to the RAM that is shared with the ASIC, or the command latch, though everything is possible...

twistedsymphony said:
you're correct that they don't. They're mapped to the u8 pal, but that is what the two jumper wires are for once u8 is removed. They properly map the those two pins of the program rom to the edge connector.
Click to expand...
That would've been my next question. :) I guess U8 implements pgm_killbld_decrypt.
The only difference I found is that on the 0333 cart some of the pins are routed to both j1 and j2 where on killing blade they're j1 only.
Click to expand...
From what I can tell from those blurry pictures there still seem to be connections to those pins. Is it possible that they go to one of the logic chips?

Open questions:
- J2 pin 61, in the middle of the ground pins, seems to be ASIC related
- J1 pin 56, right after the power pins, seems to be ASIC related
- J1 pin 26, 24,23, seem to be RAM related (maybe LDS, UDS and R/W?)

Could you check if they go to the removed ASIC, or to the small chip next to it? (The actual pin doesn't matter, just roughly where it goes.)

Anyway, productive morning:
char.jpg

This is version 1.1 of the char board. I tweaked the layout of the logic chips, changed the footprints of the capacitors, and added silkscreen information. I'll probably give a few of the old ones out for people to test before getting these made.

prog.jpg

This is WIP of the prog board. Silkscreen documentation as well, same footprint for capacitors. The schematic is complete except for the GAL, as I don't know which ones I use (or even if I can get away with a single one.) I'll do the layout once we've got the remaining mysteries solved.

The second ROM footprint for the program is probably overkill, but it gives the option for installing alternative ROMs. I'm thinking about a small prototype area in the middle as well.
 
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Fluffy said:
I just had a look, but I don't think my solution is any different to yours:
Click to expand...
Yeah, that's functionally identical to mine...

Fluffy said:
- J2 pin 61, in the middle of the ground pins, seems to be ASIC related
-J1 pin 56, right after the power pins, seems to be ASIC related
-J1 pin 26, 24,23, seem to be RAM related (maybe LDS, UDS and R/W?)
Click to expand...
J2 61 has no connection to anything
J1 56 has no connection to anything
J1 26 goes to the ASIC and to Pin 10 on the U1 PAL
J1 24 goes to U15 (The IGS Custom) and Pin 11 on the U1 PAL
J1 23 goes to Pin 1 of U19 (One of the 74LS245 chips) and Pin 8 of the U7 PAL
Fluffy said:
This is WIP of the prog board. Silkscreen documentation as well, same footprint for capacitors. The schematic is complete except for the GAL, as I don't know which ones I use (or even if I can get away with a single one.) I'll do the layout once we've got the remaining mysteries solved.
Click to expand...
You can absolutely get away with a single GAL22V10, look at the mapping I laid out for the Lydz cart, you can see of the Inputs and outputs it uses there are enough to cover everything in 1 PAL once the decrypt stuff is removed.

Also, I would suggest maybe instead of a second program ROM socket (or in addition to?) place a pin header with A20 between +5V and GROUND so that it makes installing a switch easier A similar jumper on the Sound and Background ROMs would be useful too since it seems some of these conversions require disabling half of the ROM space.
 
checking the OE pins on those 74LS245 ICs:

U16 and U19 OE -> U21 Pins 5 and 11 (74LS157) and U1 Pin18 (PAL)
U17 OE -> IGS Custom and U21 Pin 6 (74LS157)
U18 OE -> U21 Pin 10 (74LS157)

that U21 is a multiplexer, there are 4 of them on the PCB: U12, U13, U20, and U21 and they're all permanently enabled with the strobe pin tied to ground.
 
twistedsymphony said:
Also, I would suggest maybe instead of a second program ROM socket (or in addition to?) place a pin header with A20 between +5V and GROUND so that it makes installing a switch easier A similar jumper on the Sound and Background ROMs would be useful too since it seems some of these conversions require disabling half of the ROM space.
Click to expand...
Yeah, I plan one jumper to switch between DDPDOJ-style mapping with BIOS and Espgaluda/Ketsui style mapping without BIOS, and one to select low/high page for the program ROM.
 
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