Resurrecting the 32/64MBIT flash project and 8/16 bit addressing.

After many days of searching I've found some engineering drawings of the TSOP burn-in test socket
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https://www.mvs-scans.com/misc/toshiba-64mbit-adapter-master-ack2.zip

Just to be clear, they need to be 74HCT244 and not 74HC244
2x HCT244 are for Data Output bus and 3x LVC244A are for Data Input bus?

If I understand this well, 3x LVC244A prevent +5V data input from MVS enter to flash rom decreasing it to +3'3V, and 2x HCT244A increase +3'3V data output from flash rom to +5V to the MVS

Also you play how to send Q-15 signal, if by one line of LVC244A for 8-bit input mode, or by one line of HCT244 for 16-bit output mode
 
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2x HCT244 are for Data Output bus and 3x LVC244A are for Data Input bus?

If I understand this well, 3x LVC244A prevent +5V data input from MVS enter to flash rom decreasing it to +3'3V, and 2x HCT244A increase +3'3V data output from flash rom to +5V to the MVS

Also you play how to send Q-15 signal, if by one line of LVC244A for 8-bit input mode, or by one line of HCT244 for 16-bit output mode

The 2x HCT244 are for data (flash to mvs) and the 3x LVC244A are for address (mvs to flash).

The 3 jumpers deal with getting the Q-15 going to/through the correct 244.

1 jumper does the /BYTE signal on the flash
1 jumper picks the trace path from the dip socket pin to HCT244 or LVC244
1 jumper connects the trace from the HCT244 or LVC244 to the flash
 
The 2x HCT244 are for data (flash to mvs) and the 3x LVC244A are for address (mvs to flash).

The 3 jumpers deal with getting the Q-15 going to/through the correct 244.

1 jumper does the /BYTE signal on the flash
1 jumper picks the trace path from the dip socket pin to HCT244 or LVC244
1 jumper connects the trace from the HCT244 or LVC244 to the flash
So all data are +3.3V output to +5V converted and all address are +5V to +3.3V converted, am I right?
 
correct, the flash should only see 3.3V and the MVS only 5V
So you can confirm me LVC244 is a +5V to +3.3V level shifter and HCT244 is a +3.3V to +5V level shifter. I have seen in your PCB you establish LVC244 to be active always and HCT244 being active with OE signal state. I supose in my PCBs both HCT244 have to be active LOW because all the data output bus is shared with the 4 flash roms.
 
Just note this isn't my PCB, I just tweaked it to add support for picking BYTE vs WORD access.

The LVC244 outputs are 3.3V. The HCT244 outputs are 5V.

The LVC244's are always enabled because they only carry the address lines from the MVS to the flash chip. The address lines will just get ignored by the flash chip when its not enabled.

The HCT244's are the data lines going from the flash to the MVS. These must only be enabled when the MVS is asking for data from the flash, otherwise it will cause a data bus conflict.
 
The HCT244's are the data lines going from the flash to the MVS. These must only be enabled when the MVS is asking for data from the flash, otherwise it will cause a data bus conflict.
This shouldn't be a problem if always active in the new implementation I'm making, because the use of the Q0-Q15 of all the 4 roms common bus is going to be OE dependent.

Is the same use I have done in the old PCB with SOP44 PCBs, Q0-Q15 always with info dependant of which rom is OE activated. I think is going to work good.

If for example all OE are high, Q0-Q15 won't have any info inside, like original format.

The other solution is to install an extra SMD component for detect when all 4 OE signals are HIGH and deactivate the 2xHCT244. A 74LS21 can do the trick: when all 4x OE signals are HIGH, output is HIGH, in other case LOW. That way we can control 2xHCT244 combined activation
 
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Speaking only for my part, I only tested the version with 5x 74LVC244APW and not the version with mixed with HCT.
 
The other solution is to install an extra SMD component for detect when all 4 OE signals are HIGH and deactivate the 2xHCT244. A 74LS21 can do the trick: when all 4x OE signals are HIGH, output is HIGH, in other case LOW. That way we can control 2xHCT244 combined activation
You will want something like this if you have the HCT244's between the flash chips data pins and the MVS. The HCT244's won't care that the flash chips aren't outputting anything and will still output a signal if they are enabled. Having no input on the HCT244 is an undefined state so it may output high or low or just randomly flip flop between high/low.
 
You will want something like this if you have the HCT244's between the flash chips data pins and the MVS. The HCT244's won't care that the flash chips aren't outputting anything and will still output a signal if they are enabled. Having no input on the HCT244 is an undefined state so it may output high or low or just randomly flip flop between high/low.
So I'll go with 74LS21 implementation. Thanks
 
Well, I have news about my universal 4xTSOP48 adapter. I have to order a few units for testing if I have made everything right. I can test all zones and sizes, so no problem for me.

@ack I have made what we said yesterday. Adding a 74LS21 for activating/deactivating HCT244 activity when all 4 roms are disabled, and also 2 new jumpers for playing with Q15 signal:
- If BYTE is LOW (8 bit), Q15 flash is input (MVS Q15 pin signal goes to LVC244 input / LVC244 output goes to Q15 pin of 4xTSOP48 )
- If BYTE is HIGH (+3.3V) (16 bit), Q15 flash is output (4xTSOP48 Q15 pin goes to HCT244 input / HCT244 output goes to MVS Q15 pin)

RESET and WE signals of the 4xTSOP48 are tied to HIGH (+3.3V)
WP/ACC of the 4xTSOP48 is tied to GND

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Nice work.

It looks like you have the Q-15 dip pin connected to both 244s. I suspect you might run into issues when you are in 8bit mode. Specifically in that mode Q-15 from the dip will be an address signal coming from the MVS going to one of the LVC244s, but when the HCT244 that is also connected to that trace is enabled its going output a signal and cause a conflict. So I think you need another jumper that picks if the Q-15 dip is connect to the HCT244 or LVC244. I guess another possibility might be for the high byte HCT244 to never be enabled in 8 bit mode?
 
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